Commit 842ebf84 authored by Sang-Hoon Kim's avatar Sang-Hoon Kim
Browse files

Clarify the meaning of sw operands.

parent 75331da8
......@@ -47,6 +47,7 @@ Translate MIPS assembly code into corresponding MIPS machine instructions.
addi s1 s2 0x16 /* s1 <- 0x16(s2). Immeidate values and address offset
come to the last */
lw t0 s1 32 /* Load t0 with a word at 32(s1) (s1 + 32) */
sw t0 s1 32 /* Store value in t0 at 32(s1) */
beq k1 a2 -4 /* Jump to the 4 previous instruction if k1 and a2
registers contain the same value */
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