Commit 99002c8d authored by Sang-Hoon Kim's avatar Sang-Hoon Kim
Browse files

Revised some comments

parent 9f215e5b
......@@ -9,7 +9,7 @@ Translate MIPS assembly code into corresponding MIPS machine instructions.
### Problem Specification
- Implement a MIPS assembly translator that translates MIPS assembly into MIPS machine code one line at a time. With the command parser of PA0, translate tokens into bits, and merge them to produce one 32-bit machine instruction.
- Implement a MIPS assembly translator (a.k.a assembler) that translates MIPS assembly into MIPS machine code one line at a time. With the command parser of PA0, translate tokens into bits, and merge them to produce one 32-bit machine instruction.
- The framework gets a line of input from CLI, makes it to lowercase, and calls `parse_command()`. After getting the number of tokens and `tokens[]` as of PA0, the framework calls `translate()` function with them. Write your code in the function to translate the tokenized assembly and return a 32-bit MIPS machine instruction.
......@@ -39,7 +39,7 @@ Translate MIPS assembly code into corresponding MIPS machine instructions.
add s0 t1 gp /* s0 <- t1 + gp */
sub s4 s1 zero /* s4 <- s1 + zero */
sll s0 s2 3 /* s0 <- s2 << 3. shift amount comes to the last */
sra s1 t0 -5 /* s1 <- t0 >> -5 w/ sign extension */
sra s1 t0 5 /* s1 <- t0 >> 5 w/ sign extension */
```
- I-format instructions are the similar
......@@ -47,6 +47,8 @@ Translate MIPS assembly code into corresponding MIPS machine instructions.
addi s1 s2 0x16 /* s1 <- 0x16(s2). Immeidate values and address offset
come to the last */
lw t0 s1 32 /* Load t0 with a word at 32(s1) (s1 + 32) */
beq k1 a2 -4 /* Jump to the 4 previous instruction if k1 and a2
registers contain the same value */
```
- The machine has 32 registers and they are specified in the assembly as follow;
......
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