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Commit 01b29b43 authored by KimDongHwan's avatar KimDongHwan
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Update util.h

parent 8658c5c2
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......@@ -29,59 +29,72 @@
#define BYTES_PER_WORD 4
#define PIPE_STAGE 5
#define IF_STAGE 0
#define ID_STAGE 1
#define EX_STAGE 2
#define MEM_STAGE 3
#define WB_STAGE 4
typedef struct IF_ID_Struct {
instruction INSTR;
uint32_t NPC;
} IF_ID;
typedef struct ID_EX_Struct {
uint32_t NPC;
uint32_t REG1; // Register value 1
uint32_t REG2; // Register value 2
char RS;
char RD;
char RT;
uint32_t IMM; // Immediate Field
char SHAMT;
char DEST;
char ALUOp;
// 1: add (ADDIU, ADDU, LW, SW)
// 2: sub (SUBU, BEQ, BNE)
// 3: AND (AND, ANDI)
// 4: OR (OR, ORI, NOR)
// 5: Shift Left (SLL)
// 6: Shift Right (SRL)
// 7: Set Less Than (SLTIU, SLTU)
// 8: Shift Left 16 (LUI)
// 9: JAL (JAL)
char ALUSrc; // Second Operand from Immediate -> 1
char ALUNeg; // NOR or BNE -> 1
char Branch; // branch -> 1
char MemRead;
char MemWrite;
char RegWrite;
char MemtoReg;
char LoadUse;
} ID_EX;
typedef struct EX_MEM_Struct {
uint32_t MemValue;
uint32_t DEST;
uint32_t ALU_OUT;
uint32_t BR_TARGET;
char Branch;
char MemRead;
char MemWrite;
char RegWrite;
char MemtoReg;
} EX_MEM;
typedef struct MEM_WB_Struct {
uint32_t PC;
uint32_t DEST;
uint32_t MEM_OUT;
uint32_t ALU_OUT;
char RegWrite;
char MemtoReg;
} MEM_WB;
/* You may add pipeline registers that you require */
typedef struct CPU_State_Struct {
uint32_t PC; /* program counter for the IF stage*/
uint32_t REGS[MIPS_REGS]; /* register file */
uint32_t REGS_LOCK[MIPS_REGS]; /* register lock to support stalls
Lock registers when data is not ready*/
uint32_t PIPE[PIPE_STAGE]; /* PC being executed at each stage*/
uint32_t PIPE_STALL[PIPE_STAGE];
//IF_ID_latch
uint32_t IF_ID_INST;
uint32_t IF_ID_NPC;
//ID_EX_latch
uint32_t ID_EX_NPC;
uint32_t ID_EX_REG1;
uint32_t ID_EX_REG2;
short ID_EX_IMM;
unsigned char ID_EX_DEST;
//EX_MEM_latch
uint32_t EX_MEM_NPC;
uint32_t EX_MEM_ALU_OUT;
uint32_t EX_MEM_W_VALUE;
uint32_t EX_MEM_BR_TARGET;
uint32_t EX_MEM_BR_TAKE;
unsigned char EX_MEM_DEST;
//MEM_WB_latch
uint32_t MEM_WB_NPC;
uint32_t MEM_WB_ALU_OUT;
uint32_t MEM_WB_MEM_OUT;
uint32_t MEM_WB_BR_TAKE;
unsigned char MEM_WB_DEST;
//Forwarding
unsigned char EX_MEM_FORWARD_REG;
unsigned char MEM_WB_FORWARD_REG;
uint32_t EX_MEM_FORWARD_VALUE;
uint32_t MEM_WB_FORWARD_VALUE;
//To choose right PC
uint32_t IF_PC;
uint32_t JUMP_PC;
uint32_t BRANCH_PC;
} CPU_State;
typedef struct inst_s {
short opcode;
......@@ -115,12 +128,26 @@ typedef struct inst_s {
//char *source_line;
} instruction;
typedef struct {
uint32_t start, size;
uint8_t *mem;
} mem_region_t;
typedef struct CPU_State_Struct {
uint32_t PC; /* program counter */
uint32_t REGS[MIPS_REGS]; /* register file */
uint32_t PIPE[PIPE_STAGE]; /* pipeline stage */
IF_ID if_id;
ID_EX id_ex;
EX_MEM ex_mem;
MEM_WB mem_wb;
uint32_t STALL; /* The number of needed stalls. Fetch when 0 */
uint32_t FLUSH;
char LoadUse;
} CPU_State;
/* For PC * Registers */
extern CPU_State CURRENT_STATE;
......@@ -133,29 +160,22 @@ extern mem_region_t MEM_REGIONS[2];
/* For Execution */
extern int RUN_BIT; /* run bit */
extern int FETCH_BIT; /* instruction fetch bit */
extern int INSTRUCTION_COUNT;
extern int BR_BIT; /* Branch predictor enabled */
extern int FORWARDING_BIT;
extern uint64_t MAX_INSTRUCTION_NUM;
extern uint64_t CYCLE_COUNT;
/* Functions */
char** str_split(char *a_str, const char a_delim);
int fromBinary(const char *s);
int fromBinary(char *s);
uint32_t mem_read_32(uint32_t address);
void mem_write_32(uint32_t address, uint32_t value);
void cycle();
void run();
void run(int num_cycles);
void go();
void mdump(int start, int stop);
void rdump();
void pdump();
void init_memory();
void init_inst_info();
/* YOU IMPLEMENT THIS FUNCTION in the run.c file */
/* YOU IMPLEMENT THIS FUNCTION */
void process_instruction();
#endif
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